All modules
CMVP Validated Module · FIPS 140-3 Security Policy

Solidigm® P5520 SSD (ADP-RR)

Certificate#4866StandardFIPS 140-3Level2TypeHardwareEmbodimentMulti-Chip EmbeddedStatusActiveVendorSK hynix NAND Product Solutions Corp (d/b/a Solidigm)
Medium review priority  ·  no TCB surface named  ·  last validated 7 months ago. How this is derived →

Certificate

StandardFIPS 140-3
Overall level2
Module typeHardware
EmbodimentMulti-Chip Embedded
StatusActive
Sunset date11/4/2029
CaveatWhen installed, initialized and configured as specified in Section 2.4 of the Security Policy. The tamper evident seals installed as indicated in the Security Policy.
VendorSK hynix NAND Product Solutions Corp (d/b/a Solidigm)

Approved Algorithms (11)

AlgorithmACVP Cert
AES-ECBA2879
AES-ECBA2881
AES-KWA2881
AES-XTS Testing Revision 2.0A2879
HMAC DRBGA2881
HMAC-SHA2-256A2881
KDF SP800-108A2881
RSA SigVer (FIPS186-4)A2880
RSA SigVer (FIPS186-4)A2881
SHA2-256A2880
SHA2-256A2881

Derived Review-Risk Graph (review prompts, not findings)

flowchart LR
  %% Deterministic review-risk graph for Solidigm® P5520 SSD (ADP-RR)
  %% Review prompts and evidence gaps, NOT vulnerability findings.
  subgraph CMVP["CMVP-disclosed clues"]
    C2["[low] Firmware update / recovery<br/>/ rollback (referenced in<br/>text)<br/><i>Update<br/>recovery</i>"]
    C3["[low] Self-test / status surface<br/>(referenced in text)<br/><i>show status<br/>Status output</i>"]
    C5["[low] Protocol / secure-channel<br/>references (may be KDF<br/>names, not a live channel)<br/><i>HTTPS<br/>no library/version identified</i>"]
    C6["[low] Operating system / runtime<br/>referenced (boundary<br/>membership not asserted)<br/><i>application</i>"]
  end
  subgraph Inference["Derived inference"]
    I2["Possible only, trusted<br/>code is reachable through<br/>update and recovery paths."]
    I3["Possible only, some<br/>services may process input<br/>before, or without,<br/>operator authentication."]
    I5["Possible only, a protocol<br/>is referenced, but whether<br/>it is a live channel or<br/>only a KDF/algorithm name<br/>is unconfirmed."]
    I6["Possible only, a<br/>runtime/OS is referenced,<br/>but its membership in the<br/>cryptographic boundary is<br/>not established."]
  end
  subgraph Risk["Reviewer question"]
    R2["Are update images<br/>authenticated before<br/>parsing, and are<br/>downgrade/rollback paths<br/>constrained?"]
    R3["Can unauthenticated<br/>services leak state,<br/>consume resources, or<br/>transition security state?"]
    R5["If a live TLS/SSH/IKE<br/>channel exists, could<br/>library CVEs apply, or is<br/>this only a<br/>KDF/documentation name?"]
    R6["If the OS/runtime is<br/>in-boundary, could its<br/>CVEs be hidden by<br/>firmware-only versioning?"]
  end
  subgraph Evidence["Evidence needed to close"]
    E2["confirm the disclosure<br/>itself (keyword hit,<br/>context unverified) ·<br/>update image format ·<br/>signature-before-parse<br/>proof · anti-rollback /<br/>downgrade policy"]
    E3["confirm the disclosure<br/>itself (keyword hit,<br/>context unverified) ·<br/>pre-auth reachability<br/>matrix · rate limits and<br/>output redaction ·<br/>abuse-case tests"]
    E5["confirm the disclosure<br/>itself (keyword hit,<br/>context unverified) ·<br/>library identity and<br/>version ·<br/>certificate-validation<br/>behaviour · protocol-CVE<br/>disposition"]
    E6["confirm the disclosure<br/>itself (keyword hit,<br/>context unverified) ·<br/>runtime identity and<br/>config · kernel/runtime<br/>hardening profile ·<br/>patch/backport manifest"]
  end
  C2 --> I2 --> R2 --> E2
  C3 --> I3 --> R3 --> E3
  C5 --> I5 --> R5 --> E5
  C6 --> I6 --> R6 --> E6
  classDef clue fill:#eef3f9,stroke:#6f7f91,color:#1f3a5f;
  classDef infer fill:#fff7e6,stroke:#b98500,color:#6b4e00;
  classDef risk fill:#fbe9e9,stroke:#b02a2a,color:#7a1f1f;
  classDef evidence fill:#e6f4ea,stroke:#1e7d34,color:#14532d;
  class C2,C3,C5,C6 clue;
  class I2,I3,I5,I6 infer;
  class R2,R3,R5,R6 risk;
  class E2,E3,E5,E6 evidence;
Underlying clues
flowchart LR
  %% Deterministic clue tier for Solidigm® P5520 SSD (ADP-RR)
  %% confidence: high = structured record field; medium = structured but soft; low (dashed) = bare keyword hit, context unverified
  subgraph CMVP["CMVP-disclosed clues (deterministic)"]
    C2["[low] Firmware update / recovery / rollback (referenced in text)<br/><i>Update<br/>recovery</i><br/>src: text:keyword"]
    C3["[low] Self-test / status surface (referenced in text)<br/><i>show status<br/>Status output</i><br/>src: text:keyword"]
    C5["[low] Protocol / secure-channel references (may be KDF names, not a live channel)<br/><i>HTTPS<br/>no library/version identified</i><br/>src: text:keyword"]
    C6["[low] Operating system / runtime referenced (boundary membership not asserted)<br/><i>application</i><br/>src: text:keyword"]
  end
  classDef clueHigh fill:#eef3f9,stroke:#2f6fb0,stroke-width:2px,color:#1f3a5f;
  classDef clueMedium fill:#eef3f9,stroke:#6f7f91,color:#1f3a5f;
  classDef clueLow fill:#f7f7f7,stroke:#999,stroke-dasharray:4 4,color:#444;
  class C2,C3,C5,C6 clueLow;

Security Policy, page by page

Page 1

Solidigm® P5520 SSD (ADP-RR) Security Policy Solidigm® Corporation Solidigm® P5520 SSD (ADP-RR) FIPS 140-3 Cryptographic Module Version: 1.3 Date: July 28, 2025 Prepared by: www.acumensecurity.net

Page 2

Solidigm® P5520 SSD (ADP-RR) Security Policy Table of Contents

Page 3

Solidigm® P5520 SSD (ADP-RR) Security Policy List of Tables Table 4 - Non-Approved Algorithms Allowed in the Approved Mode of Operation with No Security List of Figures

Page 4

Solidigm® P5520 SSD (ADP-RR) Security Policy © 2025 Solidigm® Corporation. This document can be reproduced and distributed only whole and

Page 5

Solidigm® P5520 SSD (ADP-RR) Security Policy About FIPS 140-3 Federal Information Processing Standards Publication 140-3

Page 6

Solidigm® P5520 SSD (ADP-RR) Security Policy 1. General

1.1 Scope

This document describes the cryptographic module security policy for the Solidigm® P5520 SSD (ADP-RR), Hardware and Firmware versions described in Table 2. It contains specification of the security rules, under which the cryptographic module operates, including the security rules derived from the requirements of the FIPS 140-3 standard.

1.2 Overview

The Solidigm® P5520 SSD (ADP-RR) is a hardware module in a multi-chip embedded embodiment which provides data-at-rest protection, using AES-XTS-256 to encrypt user data prior to being written to media. Authentication and access controls in the module are provided by the Opal Storage Specification (v2.01) by the Trusted Computing Group Storage Workgroup. The module is designed to be installed in a data center environment configured as a Single Port NVMe storage device. The following table lists the level of validation for each area in FIPS 140-3: ISO/IEC 24759 FIPS 140-3 Section Title Security Level Section 6 [Number Below]

1 General 2
2 Cryptographic module specification 2
3 Cryptographic module interfaces 2
4 Roles, services, and authentication 2
5 Software/Firmware security 2
6 Operational environment N/A
7 Physical security 2
8 Non-invasive security N/A
9 Sensitive security parameter management 2
10 Self-tests 2
11 Life-cycle assurance 2
12 Mitigation of other attacks N/A

Table 1 - Security Levels The module meets the overall Security Level 2 requirements. The Module implementation is compliant with:

Page 7

Solidigm® P5520 SSD (ADP-RR) Security Policy

Page 8

Solidigm® P5520 SSD (ADP-RR) Security Policy 2. Cryptographic Module Specification The multi-chip embedded Module, pictured below in Figure 1, is intended for use by US Federal agencies and other markets that require FIPS 140-3 validated Self Encrypting Solid State Disks. Figure 1

Page 9

Solidigm® P5520 SSD (ADP-RR) Security Policy Figure 3- E1.L Module Picture (Top Side with secured black latch) Figure 4

Page 10

Solidigm® P5520 SSD (ADP-RR) Security Policy Figure 6

2.1 Tested Configurations

The module was tested in two different form factors (U.2 and E1.L), each with two different capacities. Hardware Distinguishing Model [Part Number and Firmware Version Features Version] U.2 2.5”x 15mm drive P/N: SSDPF2KX019T1T in 1920GB capacity, Ver: M16410-10102 with 1.4.0 Intel or Solidigm TEL P/N: M52551-001 branded U.2 2.5”x 15mm drive P/N: SSDPF2KX038T1T in 3840GB capacity, Ver: M16414-10102 with 1.4.0 Intel or Solidigm TEL P/N: M52551-001 branded Solidigm® P5520 SSD U.2 2.5”x 15mm drive P/N: SSDPF2KX076T1T in 7680GB capacity, Ver: M16427-10102 with 1.4.0 Intel or Solidigm TEL P/N: M52551-001 branded U.2 2.5”x 15mm drive P/N: SSDPF2KX153T1T in 15360GB capacity, Ver: M17283-10009 with 1.4.0 Intel or Solidigm TEL P/N: M52551-001 branded

Page 11

Solidigm® P5520 SSD (ADP-RR) Security Policy Hardware Distinguishing Model [Part Number and Firmware Version Features Version] U.2 2.5”x 15mm drive P/N: SSDPF2KE016T1T in 1600GB capacity, Ver: M16410-10102 with 1.4.0 Intel or Solidigm TEL P/N: M52551-001 branded U.2 2.5”x 15mm drive P/N: SSDPF2KE032T1T in 3200GB capacity, Ver: M16414-10102 with 1.4.0 Intel or Solidigm TEL P/N: M52551-001 branded U.2 2.5”x 15mm drive P/N: SSDPF2KE064T1T in 6400GB capacity, Ver: M16427-10102 with 1.4.0 Intel or Solidigm TEL P/N: M52551-001 branded U.2 2.5”x 15mm in P/N: SSDPF2KE128T1T 12800GB capacity, Ver: M17283-10009 with 1.4.0 Intel or Solidigm TEL P/N: M52551-001 branded P/N: SSDPFWKX153T1D E1.L 9.5 mm drive in Ver: M21006-10101 with 15360GB capacity, 9CV10490 TEL P/N: M45818-002 and Intel or Solidigm Latch P/N: AA0015502 branded U.2 2.5”x15mm drive P/N: SSDPF2KX019T1X in 1920GB capacity, Ver: M16410-10102 with 9CV10490/9CV10510 Intel or Solidigm TEL P/N: M52551-001 branded U.2 2.5”x 15mm drive P/N: SSDPF2KX038T1X in 3840GB capacity, Ver: M16414-10102 with 9CV10490/9CV10510 Intel or Solidigm TEL P/N: M52551-001 branded U.2 2.5”x 15mm drive P/N: SSDPF2KX076T1X in 7680GB capacity, Ver: M16427-10102 with 9CV10490/9CV10510 Intel or Solidigm TEL P/N: M52551-001 branded U.2 2.5”x 15mm drive P/N: SSDPF2KX153T1X in 15360GB capacity, Ver: M17283-10009 with 9CV10490/9CV10510 Intel or Solidigm TEL P/N: M52551-001 branded Table 2 - Cryptographic Module Tested Configuration

2.2 Algorithms

The Module implements the Approved cryptographic functions listed in the table below.

Page 12

Solidigm® P5520 SSD (ADP-RR) Security Policy CAVP Algorithm and Mode/Method Description / Key Use / Function Cert1 Standard Size(s) / Key Strength(s) A2881 AES [FIPS 197, SP ECB 256 bits Encryption and Decryption of 800-38A] encryption Keys A2881 AES [FIPS 197, SP KW 256 bits Encryption and Decryption of the 800-38F] Keys for key storage A2879 AES [FIPS 197, SP XTS, ECB2 256 bits XTS Encryption and Decryption 800-38A, SP 800- operations within storage 38E] applications Vendor CKG [SP 800-133, Section 4, 6.1, 256 bits Direct seed and symmetric key Affirmed rev 2] 6.2 generation using unmodified DRBG IG D.H output A2881 DRBG [SP 800-90A, HMAC_DRBG 256 bits Generate random bits used to rev 1] create cryptographic keys ENT ENT (P) [SP 800- Physical entropy Entropy Source Broadcom TRNG 90B] source A2881 HMAC [FIPS 198-1] HMAC-SHA2- 256 bits HMAC-DRBG, KBKDF, KDF A2881 KBKDF [SP 800-108, Counter Mode 256 bits Used to derive symmetric rev 1] encryption keys used internal to the drive A2881 PBKDF [SP 800- KDF with Option 256 bits Used as part of authentication of 132] 1a Cryptographic Officer role - HMAC-based Note: The keys derived from KDF using SHA2passwords are only used for storage applications -10,0003 iteration count A2880 RSA [FIPS 186-4 sigVer PKCS1.5 2048 bits Digital Signature Verification and PKCS #1 v2.1 with SHA2-256 (Firmware Integrity test) (PKCS1.5)] A2881 RSA [FIPS 186-4 sigVer PKCS1.5 2048 bits Digital Signature Verification and PKCS #1 v2.1 with SHA2-256 (Firmware Download, Maintenance (PKCS1.5)] authentication) A2880 SHS [FIPS 180-4] SHA2-256 N/A Hashing for Digital Signature Verification for the integrity test A2881 SHS [FIPS 180-4] SHA2-256 N/A Hashing for Digital Signature Verification, HMAC DRBG, Key Based-KDF operations Table 3

Page 13

Solidigm® P5520 SSD (ADP-RR) Security Policy Algorithm Caveat Use/Function AES-CTR (non-compliant) Used for added protection of Used to wrap key data stored keys but is not required (Encrypted Key Blob) using a for security non-SSP. Note, this algorithm was CAVP tested but is not used in a way that claims security. Table 4 - Non-Approved Algorithms Allowed in the Approved Mode of Operation with No Security Claimed The module does not implement any of the following algorithms:

2.3 Cryptographic Boundary

The cryptographic boundary is defined as the external perimeter of the SSD enclosure and is composed of the following components:

  1. Sentinel Rock Plus ASIC (C0 stepping) – The storage controller ASIC. This component is responsible for terminating PCIe/NVMe commands, reading or writing data to the Host platform, encrypting or decrypting data from the Host platform, and storing or retrieving data to NAND non-volatile memory.
  2. DRAM – Dynamic RAM.
  3. NAND – non-volatile memory. These components comprise the non-volatile media of the storage device. These components store encrypted user data, firmware for the P5520, and other nonvolatile configuration data needed by the ASIC controller during execution.
  4. MIC – SMBus controller The Module relies on the PCIe/NVMe interface as input/output devices. Two capacitors within the module boundary are excluded from the FIPS 140-3 requirements. The exclusion of these components does not affect the security of the module.
2.4 Approved Mode of Operation

The Module ships from the manufacturing facility with either the Approved firmware identified in Table

2 or a firmware which has not been validated.

To determine if a module is using an Approved firmware version, the Compliance Descriptor will be retrieved via the Read Compliance (show status) service and the following information will be verified (Note: Byte references below are from a starting index of zero):

  1. Related Standard indicates FIPS 140-3 (3) on byte 13
  2. Overall Security Level indicates Level 2 (2) on byte 14
  3. Compliance Descriptor Hardware Version (byte 16) matches the HW P/N and Version column of a configuration in Table 2.
Page 14

Solidigm® P5520 SSD (ADP-RR) Security Policy

  1. Compliance Descriptor Version (byte 144) matches the FW Version column of a configuration in Table 2.
  2. Compliance Descriptor Module Name (byte 272) matches the Module column of a configuration in Table
  3. When the Approved firmware is installed, the module is in an uninitialized state and user authentication is not enabled. When the Approved firmware is not installed, the Cryptographic Officer will have to perform the following procedure to transition the module to an uninitialized state:
  4. Update the firmware with the Firmware Update service to the Approved firmware
  5. Reset the module
  6. Enable/Activate Opal
  7. Perform an AdminSP Revert method on the AdminSP Once in the uninitialized state, the Module must be placed into the approved mode of operation (Initialized) through the following initialization procedure:
  8. Taking ownership of Opal by setting the AdminSP SID credential to something other than MSID (default password)
  9. Activating the LockingSP
  10. Setting the WriteLockEnabled and ReadLockEnabled column within the Locking Table of all ranges containing sensitive user data via the Lock, Unlock Ranges service.
  11. Power cycle the drive or set the WriteLock and ReadLock columns to True within the Locking Table of all ranges containing sensitive user data. The CO role is responsible for configuration of other CO and user roles as well as enabling locking/unlocking of any of the CO role-controlled areas (locking ranges). The User roles are responsible for enabling locking/unlocking of the assigned locking ranges as well as performing locking/unlocking of their assigned locking range. In Approved mode (Initialized), the CO Role requires authentication and unlock prior to allowing access to data, whereas the uninitialized mode does not. The module will be in a non-compliant state if not initialized. To determine if a Module is in the Approved mode of operation (Initialized), the following must be verified:
  12. The LockingEnabled bit of the TCG Level 0 Discovery Locking Feature Descriptor is set to 1
  13. Minimally, the ReadLockEnabled column of the Locking Table is set to the True state for all ranges covering sensitive user data It is possible to switch from the Initialized state to an uninitialized state by performing the AdminSP Revert service. However, the module shall be initialized to be in an Approved mode of operation before any User accesses the Module and calls any services different than those described in this section’s instructions.
Page 15

Solidigm® P5520 SSD (ADP-RR) Security Policy

2.5 Rules of Module Operation

The Module design corresponds to the Module security rules. This section documents the security rules enforced by the cryptographic Module to implement the security requirements of this FIPS 140-3 Level 2 Module.

  1. The Module shall provide three distinct operator roles: Cryptographic Officer, User, and Maintenance.
  2. The Module shall provide role-based authentication.
  3. The Module shall clear previous authentications on power cycle.
  4. If an operator has not been successfully authenticated, no cryptographic services are available to the operator.
  5. The operator shall be capable of commanding the Module to perform the power-up self-tests by cycling power or resetting the Module.
  6. Power-up self-tests do not require any operator action.
  7. Control Input and Data output shall be inhibited during self-tests and error states.
  8. Data output shall be logically disconnected during key generation and zeroization.
  9. Status information does not contain CSPs or sensitive data that if misused could lead to a compromise of the Module.
  10. There are no restrictions on which keys or CSPs are zeroized by the zeroization service.
  11. The Module does not support manual key entry.
  12. The Module does have external input/output devices used for entry/output of data.
  13. The Module does not output plaintext CSPs.
  14. The Module does not output intermediate key values.
  15. The Module does not support a bypass capability service.
  16. The Module does not support the update of the logical serial number or vendor ID. The following section documents the security rules imposed by the vendor.
  17. The operator is capable of commanding the Module to perform the power-up Self-Tests by cycling power or resetting the Module.
  18. The shipping container protecting the module or set of modules in transit should be verified for tamper evidence.
  19. If the Module is shipped from the factory with the Approved firmware installed and uninitialized (TCG Opal is in a manufactured inactive state), the steps in section 2.4 will have to be followed.
  20. If the module is shipped with the Approved firmware not installed, seals will need to be applied as described in Section 7 and then the module must be initialized as described in Section 2.4
  21. The module CSPs may be zeroized by calling the Revert method on the AdminSP in the Opal interface of the cryptographic Module.
Page 16

Solidigm® P5520 SSD (ADP-RR) Security Policy

  1. Successful execution of the challenge / response protocol zeroizes the module prior to allowing a Maintenance operation.
  2. The module shall be zeroized using the service: “Module Reset” and “Zeroize/Admin SP Revert” after performing a Maintenance operation. The operator shall follow the procedure contained in “Solidigm SSD_DC_D7-D4512 _Procedure_To_Exit_Maintenance_Mode.pdf” - Version 1.0 to exit the maintenance mode.
  3. The password length must be equal or greater to 8 bytes.
  4. The Module shall be initialized by the CO before any User access the Module and calling any services different than those described in Section 2.4
  5. Cryptographic Module Interfaces The physical ports and logical interfaces4 are identified in Table 4 below: Physical port Logical interface Data that passes over port/interface Data input NVMe interface used for both normal and maintenance operations Data output NVMe interface used for both normal and maintenance operations Control input NVMe interface used for both normal and maintenance operations, SMBus PCIe Connector management interface, VDM interface, UART interface MUX for Debug accessed only during maintenance Status output NVMe interface used for both normal and maintenance operations, SMBus management interface, VDM interface, UART interface MUX for Debug Control output is not supported.
Page 17

Solidigm® P5520 SSD (ADP-RR) Security Policy Power interface Power interface UART Control input UART interface for Debug (available with latch removal in E1.L) Status output UART interface for Debug (available with latch removal in E1.L) LED (E1.L only) Status output Signals to illuminate module LED status Table 5

Page 18

Solidigm® P5520 SSD (ADP-RR) Security Policy 4. Roles, Services, and Authentication

4.1 Assumption of Roles

The Module supports three (3) distinct roles: Cryptographic Officer (CO), User, and Maintenance roles. The cryptographic Module enforces the separation of CO and User roles using a credential (named password or PIN) that is provisioned for the administrator (CO) role as part of taking ownership and personalization of the Opal security subsystem. The credential is verified as part of authentication as the specific role during session startup to the Opal Security Subsystem. Access control over configuration mechanisms under control of the administrator is enforced by the Module firmware. The Maintenance role is entered via authentication of an RSA 2048-bit challenge/response protocol with 512-bit nonce and PSID verification (to prove physical presence). This role grants maintenance and recovery capabilities to the Module implementer. The PSID is a unique identifier of each device and is classified as a non-CSP. A unique PSID value is printed on each device label and stored in the module’s OTP. No security is claimed from this value but is used solely to prove physical presence. It is feasible for the Module to process concurrent operations by roles. However, the Module can only support one Opal session at a time. This implies that authentication to the Module by various roles must be serialized. Once authenticated, various roles may interact with the Module simultaneously. As an example, the CO role may perform administrative tasks while the User role is simultaneously reading and writing data to the module. Role Service Input Output Cryptographic

Page 19

Solidigm® P5520 SSD (ADP-RR) Security Policy Role Service Input Output

Page 20

Solidigm® P5520 SSD (ADP-RR) Security Policy Role Service Input Output User (Opal

Page 21

Solidigm® P5520 SSD (ADP-RR) Security Policy Role Authentication Method Authentication Strength verification (to prove The security strength of the physical presence) authentication method is greater than

112 bits

Therefore, the probability of a random attempt of generating a matching signed challenge is 1/2^112 which is smaller than 1/10^6

4.2 Services

All services implemented by the Module in Approved mode are listed in Table 7 below. Each service description also describes all usage of CSPs by the service. The service names highlighted in bold can be called in the uninitialized state. Note:

Page 22

Solidigm® P5520 SSD (ADP-RR) Security Policy Service Description Approved Security Keys and/or Roles Access rights to Keys Indicator Functions SSPs and/or SSPs Take Obtain the default PBKDF2 AdminSP SID, CO W Compliance descriptor Ownership credential (SID = MSID) for Salt and success return the Opal and configure code the Opal credential to a unique value (SID != MSID) Data Protects access to the AES-XTS MEK CO, U E Compliance descriptor Encryption/Dec Media Encryption Keys and success return ryption stored in the Module in code ciphertext form The cryptographic officer or user password is used to generate an intermediate key (Pkey) which is used to unwrap a Key Ring Encryption Key which is then used to unwrap the Media Key Encryption Key which is then used to unwrap the Media Encryption Key Activate Opal Enable through TCG Opal PBKDF2, AES-KW, User CO G, E Compliance descriptor Activate command AES-ECB, KBKDF, Password, and success return HMAC, SHS User PKey, code User KREK, MKEK, Opal Admin PKey, Opal Admin KREK

Page 23

Solidigm® P5520 SSD (ADP-RR) Security Policy Service Description Approved Security Keys and/or Roles Access rights to Keys Indicator Functions SSPs and/or SSPs Change Admin Change any password in PBKDF2 Opal Admin CO G, E Compliance descriptor Password AdminSP PKey and success return code Zeroise/Admin Destroy user data (TCG DRBG, ENT, HMAC, All CSPs CO Z Compliance descriptor SP Revert Revert) SHS and success return code Disable Disable authorities to PBKDF2 Opal Admin CO E Compliance descriptor Authorities make them invalid and no KREK and success return longer able to code authenticate to the drive Enable Enable authorities to PBKDF2 Opal Admin CO E Compliance descriptor Authorities make them valid for a user KREK and success return to be able to authenticate code to the drive Configure Configure locking ranges PBKDF2 User KREK CO, U (if G Compliance descriptor Locking Ranges in the CM enabled by and success return CO) code Format NVM/ Destroy any data PBKDF2, DRBG, ENT, MEK, MKEK, CO, U G, E Compliance descriptor Crypto Erase (changing key) HMAC, SHS, CKG, AES- Device Root and success return CTR Key (Non- code SSP), Ephemeral Blob Encryption Key (NonSSP), DRBG-EI, DRBG-Seed, DRBG-State

Page 24

Solidigm® P5520 SSD (ADP-RR) Security Policy Service Description Approved Security Keys and/or Roles Access rights to Keys Indicator Functions SSPs and/or SSPs TCG RevertSP Revert and keep data PBKDF2, AES-KW, AES- MKEK, User CO Z, E Compliance descriptor and Keep Data Reset all configuration ECB, KBKDF, HMAC, KREK and success return data in the locking SP but SHS code do not destroy user data in the Global Range Set Data Store Set data store

Page 25

Solidigm® P5520 SSD (ADP-RR) Security Policy Service Description Approved Security Keys and/or Roles Access rights to Keys Indicator Functions SSPs and/or SSPs Maintenance The module allows the RSASSA-PKCS1-v1.5, RSA Public MR E Compliance descriptor FW Update firmware to be updated SHS ADU and success return through a vendor unique Verification code command in the event of Key, RSA a firmware failure Public This authentication Firmware mechanism is used to Verification verify the firmware using Key RSASSA-PKCS1-v1.5 signature verification with SHA2-256 and the internal RSA Public FW Verification Key Module Reset Reset the Module by N/A N/A CO, U N/A N/A power cycle, or (Self-Test) performing NVMe Controller or NVM Subsystem reset Performs self-tests, firmware integrity check Low Power Place the module into a CKG [SP 800-133, REK CO, U G, E The module stops State Entry low power state rev2] MEK processing commands AES KW [SP800-38F] from the host Low Power Resume the module from AES KW [SP800-38F] REK CO, U E The module resumes State Exit the low power state MEK processing commands from the host

Page 26

Solidigm® P5520 SSD (ADP-RR) Security Policy Service Description Approved Security Keys and/or Roles Access rights to Keys Indicator Functions SSPs and/or SSPs Read Query the module for N/A N/A CO, U N/A N/A Compliance configuration information (show status) by reading the TCG defined Level 0 Feature Descriptor, the NVMe defined Identify command, and the T10 Compliance Descriptor as defined in [SFSC]. This service provides the module version information. Firmware Download new firmware RSASSA-PKCS1-v1.5, RSA Public CO, U, MR E Compliance descriptor Update images to the module SHS Firmware and success return using NVMe defined Verification code Firmware Download and Key Commit commands NVMe-MI Basic Retrieves drive status N/A N/A U N/A N/A Management (status flags, SMART Command warnings, temperature, VID, serial number, etc.) NVMe Issue administrative N/A N/A U N/A N/A Administration commands (not previously mentioned) to the module, as defined in the NVMe specification This may include Vendor Unique public commands that are in compliance with the NVMe specification

Page 27

Solidigm® P5520 SSD (ADP-RR) Security Policy Service Description Approved Security Keys and/or Roles Access rights to Keys Indicator Functions SSPs and/or SSPs Block SID Allows host pre-OS PBKDF2 AdminSP SID CO E Compliance descriptor application to lock access and success return to the SID authority by code subsequently loaded host software MBR Shadow Read/write Pre-Boot PBKDF2 AdminSP SID CO E Compliance descriptor Application (PBA) to a and success return reserved area of Module code non-volatile memory Table 8

Page 28

Solidigm® P5520 SSD (ADP-RR) Security Policy

  1. Software/Firmware Security The Module is designated as a limited operational environment under the FIPS 140-3 definitions and operates on the Sentinel Rock Plus C0 ASIC processor. The Module includes a firmware load service to support necessary field updates. The Module will not load or execute firmware which is not signed with the Solidigm 2048-bit RSA private key. The mechanisms available to perform a firmware load are the following:
  2. Through NVMe using NVMe Firmware Download and Commit operations
  3. Through NVMe, SMBUS or UART (after removing tamper evident label for E1.L and latch) after entering the Maintenance role New firmware versions within the scope of this FIPS 140-3 validation must be validated through the CMVP. Any other firmware loaded into this Module is out of the scope of this validation and will require a separate FIPS 140-3 validation. The module’s integrity test can be run on demand by power cycling the Module or by the Module Reset service.
Page 29

Solidigm® P5520 SSD (ADP-RR) Security Policy 6. Operational Environment This section is not applicable to the module.

Page 30

Solidigm® P5520 SSD (ADP-RR) Security Policy

  1. Physical Security The following physical security measures are implemented in the module, which meet the requirements for a multi-chip embedded embodiment at Security Level 2: • The Module consists of production-grade components enclosed in an aluminum alloy enclosure, which is opaque within the visible spectrum. • The U.2 enclosure contains two parts: a top and bottom part that affix together using a hinge on the back side of the Module and two (2) screws that affix the top to the bottom near the PCIe edge connector. • The E1.L enclosure contains three parts: a top and a bottom part that affix together using eight (8) screws that affix the top and bottom together as well as a latch affixed with two (2) screws. • For the U.2 model, one (1) tamper-evident seal is affixed to the front of the Module such that if the Module top and bottom are separated, exposing the internals of the Module, that the tamper-evident seal will be broken in the process. The position of the one (1) tamper-evident seal is indicated in Figure 1 and Figure
  2. The tamper-evident seals are captured as part of the model part number that is listed in Table 2. • For the E1.L model, three (3) tamper-evident seals are affixed to the bottom of the Module such that if the Module top and bottom are separated, exposing internals of the Module, that the tamper-evident seals will be broken in the process. The position of the three (3) tamper-evident seals are indicated in Figure
  3. The tamper evident seals are captured as part of the model number that is listed in Table
  4. Physical Security Recommended Frequency Inspection/Test Guidance Details Mechanism of Inspection/Test Three (3) tamper-evident 12 months Inspect the tamper-evident seals for labels affixed to the scratches, gouges, cuts, and other signs module’s back face (E1.L) of tamper. Remove from service if tampering is found. One (1) tamper-evident 12 months Inspect the tamper-evident seal for label affixed to the scratches, gouges, cuts, and other signs module’s front (U.2) of tamper. Remove from service if tampering is found. Production grade cases 12 months Inspect the entire perimeter for cracks, gouges, lack of enclosure, bent clips, and other signs of tamper. Remove from service if tampering is found. Table 9 – Physical Security Inspection Guidelines The Cryptographic Officer is responsible for obtaining, storing, and applying new tamper-evident labels should the module require maintenance or repair upon inspection. The Crypto Officer can order new tamper evident seals using the part number M45818-002 (E1.L form factor) or M52551-001 (U.2 form factor).
Page 31

Solidigm® P5520 SSD (ADP-RR) Security Policy Figure 7 - U.2 Module Seal Application Locations - Front Figure 8 - E1.L Module (Intel Branded) Seal Application Locations -- Back

7.1 Applying Tamper-Evident Seals

Some modules may be shipped without the required tamper- evident seals. The tamper-evident seals shall be installed for the module to operate in Approved mode of operation. To convert the module to Approved mode of operation, the following procedure must be followed to apply the provided seals to the module:

  1. Clean seal surface a. Use isopropyl alcohol of equivalent solution to remove any contaminants from the enclosure seam seal location b. Handle drive and seal with gloves
  2. Locate the Tamper Evident Label Locations a. For U.2 Module: There is just one seal to be placed on the right front of the module (see Figure 6) b. For E1.L Module There are three seals to be placed on the bottom side of the module; one seal over the upper far right screw next to the PCIe connector, one seal over the lower third screw from the PCIe connector and a third seal on the screw on the lower far left attaching the black latch (see Figure 8).
  3. Use tweezers to lift seal from liner and place on the seam of the enclosure for the designated area (see Figure below for an example on the U.2 Module).
  4. Apply finger pressure to seal pressing out any air or lifted edges
Page 32

Solidigm® P5520 SSD (ADP-RR) Security Policy Figure 9 - Applying Tamper-Evident Seals EFP/EFT testing of the module is not applicable as the module does not claim Security Level 3 or above. 8. Non-invasive Security This section is not applicable to the module.

Page 33

Solidigm® P5520 SSD (ADP-RR) Security Policy 9. Sensitive Security Parameter Management Key/SSP Strength Security Generation Import/ Establishment Storage Zeroisation Use & related keys Name/Type Function and Export Cert. Number DRBG-EI 256 DRBG [SP 800- ENT (P) N/A N/A Volatile Cleared DRBG entropy input used to (CSP) 90A, rev1] (Whenever memory automatically derive the DRBG-Seed (#A2881) encryption (plaintext) after key keys are derivation derived by operation the module) completes or Reset DRBG-State 256 DRBG [SP 800- DRBG N/A N/A Volatile Cleared HMAC_DRBG internal state (CSP) 90A, rev1] (Whenever memory automatically (V and Key) derived from (#A2881) encryption (plaintext) after key the DRBG-Seed keys are derivation derived by operation the module) completes or Reset DRBG-Seed 256 DRBG [SP 800- DRBG N/A N/A Volatile Cleared DRBG HMAC seed derived (CSP) 90A, rev1] (Whenever memory automatically from the DRBG_EI (#A2881) encryption (plaintext) after key keys are derivation derived by operation the module) completes or Reset Opal Admin 256 AES KW KBKDF [SP N/A N/A ASIC AdminSP Opal Admin Key Ring KREK (CSP) [SP800-38F] 800-108, internal Revert Encryption Key is used to (#A2881) rev1] (At TCG memory protect/encrypt the Admin Opal (plaintext), Locking Range Key Ring(s) Activation NAND (encrypted with Opal

Page 34

Solidigm® P5520 SSD (ADP-RR) Security Policy Admin Pkey) AdminSP Varies, must PBKDF2 [SP External to Import: N/A Temporaril Internally AdminSP SID (Password)is SID (CSP) be of 800-132] the module Plaintext y in volatile zeroized once used to authenticate the CO minimum (#A2881) (By the CO (electroni memory the Admin has and is used to derive the length of 8 role) cally) (plaintext) been Opal Admin PKey bytes Export: authenticated enforced by N/A the module Opal Admin 256 AES KW PBKDF2 [SP N/A N/A ASIC Internally Admin password Key used PKey (CSP) [SP800-38F] 800-132] - internal zeroized once to encrypt / decrypt Opal (#A2881) Derived from volatile the Admin has Admin KREK and is derived admin memory been from the AdminSP SID password (plaintext) authenticated and salt (During Authenticati on) MEK (CSP) 256 AES XTS CKG [SP 800- N/A N/A ASIC From ASIC Media Encryption Keys are [SP800-38E] 133, rev2] internal internal used to protect user data CKG [SP 800- volatile memory when stored to non-volatile 133, rev2] memory during Power memory (#A2879) (plaintext), Cycle, Hard NAND Reset, (encrypted Maintenance by MKEK) Mode From NVM at Opal Activation and Crypto Erase commands, or issuance of NVMe Format

Page 35

Solidigm® P5520 SSD (ADP-RR) Security Policy NVM, Crypto Erase, or Sanitize commands MKEK (CSP) 256 AES KW CKG [SP 800- N/A N/A ASIC From ASIC Media Key Encryption Keys [SP800-38F] 133, retv2] internal internal are used to protect Media CKG [SP 800- volatile memory Encryption Keys (MEKs) 133, rev2] memory during Power (#A2881) (plaintext), Cycle, Hard NAND Reset, (encrypted Maintenance by User Mode KREK) From NAND at TCG Opal Activation or Reactivate User KREK 256 AES KW KBKDF [SP N/A N/A ASIC On AdminSP User Key Ring Encryption (CSP) [SP800-38F] 800-108, internal Revert Key is used to protect the (#A2881) rev1] (During volatile MKEK Opal memory Activation; (plaintext), During User NAND Locking (encrypted Range with User Creation) PKey) User Varies, must PBKDF2 [SP Externally Import: N/A Temporaril Internally Opal User password is used Password be of 800-132] (By the User Plaintext y in volatile zeroized once to authenticate the User (CSP) minimum (#A2881) role) (electroni memory the User has and is used to derive the length of 8 cally) (plaintext) been User PKey bytes Export: authenticated enforced by N/A the module

Page 36

Solidigm® P5520 SSD (ADP-RR) Security Policy User PKey 256 AES KW PBKDF2 [SP N/A N/A ASIC Power Cycle, User password Key used to (CSP) [SP800-38F] 800-132] internal Hard Reset, encrypt / decrypt User KREK (#A2881) Derived from volatile Maintenance user memory Mode password (plaintext) and salt (During Authenticati on) Reset 256 AES KW CKG [SP 800- N/A N/A ASIC Power Cycle, Reset Ephemeral Key Ephemeral [SP800-38F] 133, rev2] At internal Hard Reset, enables recovery of Media Key (REK) CKG [SP 800- Power on of volatile Maintenance Encryption Keys across Low (CSP) 133, rev2] the Device memory Mode Power transitions (#A2881) (plaintext) RSA Public 112 RSA Key External N/A N/A Burned N/A 2048-bit RSA public Key Firmware Verification into (Protected used to verify the RSA Verification [FIPS 186-4 and Hardware from Signature of the Module’s Key (PSP) PKCS #1 v2.1 ROM modification main firmware (on Boot and (PKCS1.5)] (plaintext) and stored Firmware Download / (#A2880, with an Commit) #A2881) integrity value per IG 9.7.A) Salt (CSP) 160 PBKDF2 [SP DRBG [SP N/A N/A ASIC On AdminSP PBKDF2 Salt, 20-byte value 800-132] 800-90A, internal Revert (#A2881) rev1] volatile Whenever memory symmetric (plaintext), encryption NAND keys are (encrypted) generated by the module RSA Public 112 RSA Signature External Import: N/A Built into N/A 2048-bit RSA public Key ADU Verification (Built into Plaintext firmware (Protected used to verify the signature [FIPS 186-4 and in binary

Page 37

Solidigm® P5520 SSD (ADP-RR) Security Policy Verification PKCS #1 v2.1 firmware firmware from of the request to unlock the Key (PSP) (PKCS1.5)] binary) image modification) drive for diagnostic access ( #A2881) Table 10

Page 38

Solidigm® P5520 SSD (ADP-RR) Security Policy Entropy sources Minimum number of bits of Details entropy SP 800-90B compliant ENT (P) 0.259 bits of min entropy per bit Physical noise source from the The DRBG is seeded with 2048 Broadcom TRNG used to seed bits of random data providing the DRBG approximately 530 bits of entropy. Table 11

Page 39

Solidigm® P5520 SSD (ADP-RR) Security Policy 10. Self-Tests Each time the Module is powered up, it tests that the cryptographic algorithms operate correctly, and that sensitive data has not been damaged. Pre-operational and conditional cryptograph algorithm tests are available on demand by power cycling the Module or the Module Reset service. On power-up or reset, the Module performs the Self-Tests described below. All Cryptographic Algorithm Self-Tests (CASTS) must be completed successfully prior to any other use of cryptography by the Module. If one of the CASTs fails, the Module enters an error state requiring reset of the Module. The module uses RSA 2048 with SHA2-256 to satisfy the pre-operational integrity self-test requirement. Pre-operational Software/Firmware Description Integrity Test RSA Integrity Test Signature verification with RSA 2048 bit key and SHA2-256 (Cert. #A2880) Conditional Self-Tests Description Test Target AES-CTR (Cert. #A2881) CASTs: Encryption in CTR mode with 256 bit key KAT, Decryption in CTR mode with 256 bit key KAT AES-KW (Cert. #A2881) CASTs: Encryption in KW mode with 256 bit key KAT, Decryption in KW mode with 256 bit key KAT AES-XTS (Cert. #A2879) CASTs: Encryption in XTS mode with 256 bit key KAT, Decryption in XTS mode with 256 bit key KAT DRBG (Cert. #A2881) CASTs: HMAC DRBG (inclusive of instantiate, generate and reseed) PBKDF (Cert. #A2881) CASTs: Key Derivation Iterations: 10,000 KBKDF (Cert. #A2881) CASTs: HMAC-SHA2-256 Key Derivation KAT RSA (Cert. #A2881) CASTs: Signature Verification with 2048 bit key and SHA2-256 SP 800-90B Health NIST SP 800-90B ENT Health Tests, per SP 800-90B Section 4.5 Tests

Page 40

Solidigm® P5520 SSD (ADP-RR) Security Policy Firmware Load Test Firmware signature verification based on RSA PKCS#1 v1.5 with SHA2-256 and 2048-bit key. Key Equality Check When an XTS key is generated, the module verifies that Key1!=Key2 If a self-test fails, the Module will indicate the following information:

Page 41

Solidigm® P5520 SSD (ADP-RR) Security Policy 11. Life-Cycle Assurance

11.1 Secure Distribution

The module is shipped using a certified mail carrier. The shipping container protecting the module or set of modules in transit should be verified for tamper evidence. The module is shipped in a shipping container with yellow tape. The tape should be sealing the container. Additionally, the module is contained within a clamshell with seals that should be inspected for tampering. If the shipping container or clamshell appears to be tampered with, the CO should contact Solidigm.

11.2 Secure Installation Procedure

On receipt of the Module, the CO should examine the product to ensure it has not been tampered with during shipping according to the procedures outlined in the Section 7. Upon verification that the Module has not been tampered with, the user should initialize the module as described in Section 2.4.

11.3 Module Start-up and Initialization Procedure

See instructions in section 2.4 for module start-up information.

Page 42

Solidigm® P5520 SSD (ADP-RR) Security Policy 12. Mitigation of Other Attacks This module has not been designed to mitigate any specific attacks beyond the scope of FIPS 140-3.

Page 43

Solidigm® P5520 SSD (ADP-RR) Security Policy References and Definitions The following standards are referred to in this Security Policy. Abbreviation Full Specification Name [ISO/IEC 19790] Information technology - Security techniques - Security requirements for cryptographic modules, June 25, 2014 [SP800-140C] CMVP Approved Security Functions [SP800-131Arev2] Transitions: Recommendation for Transitioning the Use of Cryptographic Algorithms and Key Lengths, March 2019 [TCG-OPAL] Storage Work Group Storage Security Subsystem Class: Opal, Version 2.01 Final, Revision 1.00 [SFSC] Information technology

Page 44

Solidigm® P5520 SSD (ADP-RR) Security Policy Acronym Definition SSD Solid State Drive SID Secure ID TCG Trusted Computing Group XTS XEX Tweakable Block Cipher with Ciphertext Stealing